Description
1. Fourier Analysis, 25 points: This will take some work, but at the end you should have a good
idea how Fourier series represent nice inputs, and how much bandwidth you need for a good
approximation. The Fourier analysis of an input signal has already been done for you and is:
f(t) = 5 − 10/π sin(1 · 2000πt) − 10/2π sin(2 · 2000πt) − 10/3π sin(3 · 2000πt) − . . .
– Write a program (could be a lot easier) or use a calculator to calculate the first 3 harmonics
(e.g., the terms shown above) for all values of time t in increments of 0.00025 seconds from
0 to 0.003 seconds. Feel free to write a program to do this or simply use a calculator. How
many periods can be seen of the signal can be seen in the first 3 msec? (15 points)
– Plot 3 pictures of the Fourier approximation of the input signal starting with using only 1
harmonic (first two terms), 2 harmonics (first three terms), and 3 harmonics (first 4 terms).
(5 points)
– Guess what the final output shape will be if you have enough bandwidth to pass all harmonics
(it should be pretty close after 3 harmonics). (3 points)
– If the input signal is passed through a channel of bandwidth 1000 Hz what will the output
signal look like? (2 points)
2. Nyquist Limit: This will take some work but at the end you should have a good idea about how
bits are sampled, and what inter-symbol interference means. Figure 1 shows the response of a wire
to two input bits, a slow bit of width 2 usec and a fast bit of width 1 usec. The response to both slow
and fast bits (this shows that the wire cannot respond faster than once every 2 usec, its Nyquist limit)
is shown at the bottom of Figure 1. Note that I have chosen to make the response a triangular
approximation to the sinc function we studied in class. It rises to 4 Volts in 1 usec, falls to 0 after 2
usec. It then falls to -2 Volts at 2.5 usec, climbs to 0 V at 3 usec, rises to 2 V again at 3.5 usec, and
finally falls to zero at 4 usec. Unlike the real sinc function, this idealized output goes to 0 after 4
usec.
Assume that a 1 is encoded as a 4 Volt signal, and a 0 is encoded as 0 Volts. Assume that the
output to a 0 Volt input of any bit width is also 0 Volts for all time. If at any sampling instant, the
receiver measures a voltage of 2 Volts or more, it assumes it has received a 1; else it assumes it has
received a 0. The sender is going to send just 3 bits 011
– A. First assume the sender sends bits at the slow rate of once every 2 usec. Use graph paper and
color pens (or a program) to draw the 3 bits: the first bit as red, the second in blue, and the
third in black (using these colors will help the grader). Assume the sender sends its 3 bits at times
0, 2 usec, and 4 usec. The sampling instants the receiver uses are 1 usec, 3 usec and 5 usec. At
any sampling instant, the receiver measures the output voltage as the sum of the voltage values of
Due: October 18
the red, blue, and black waves. Write down the measured outputs. What bits does the receiver
output?
– B, Repeat the same process you did in Part B but this time using the “fast bit” of width 1 usec
(you are now signaling at the fabled Nyquist limit). The sender now sends its bits at times 0, 1
usec, and 2 usec and the receiver samples at 1 usec, 2, and 3 usec. Write down the measured
outputs. What bits does the receiver output?
– C, Repeatthe same process you did in Parts A and B except with a “super- sonic” bit whose width
is 0.5 usec. The output response to the supersonic input bit is exactly the same as for the fast and
slow bits. The sender now sends its bits at times 0, 0.5 usec, and 1 usec and the receiver
samples at 1 usec, 1.5 usec, and 2 usec. Clearly, the sender is being cheeky and you should
see intersymbol interference (at which sampling instants?). What bits does the receiver output?
3. C lock R ecovery: The first problem taught you output distortions can cause inter-symbol
interference if you send too fast. However, we assumed in Problem 1 that the sender and receiver
clocks were perfectly synchronized. In reality, they are not and we need clock synchronization. In
Problem 3 you will simulate the effect of clock recovery on some bits sent using 4-5 encoding using
a clock synchronization algorithm I give you below.
Assume the preamble has been received and the receiver is basically in sync except for possible
clock drift. Thus the receiver is sampling according to its current clock (see figure 2) and should
be expecting transitions only at what it thinks are bit boundaries (see dotted lines in figure).
However, because of clock drift the actual transitions may be a little off (see the solid line in
Figure 2).
Remember that in 4-5 coding you are guaranteed to get at least one transition in every 5
consecutive bits; however, you may get up to 5 transitions. Pseudocode for the receiver clock recovery
algorithm is as follows.
Receiver Code
Data Structures:
T: real constant; (* nomimal time to send a bit, input to program *)
P: real; (* predicted next time at which a transition might occur*)
A: real; (* actual real time at which a transition occurs *)
lag: real; (* difference between predicted and expected *)
After preamble is detected:
Initialize real time clock to start at 0;
lag = 0;
P = 0;
StartTimer (T/2);
Wait (TimerExpiry);
Do until end of frame
P = P + T + lag;
Output (SampleSignal); (* output sampled value when timer expires *)
StartTimer (T + lag);
Wait (Timer Expiry);
In parallel with Wait look for a Transition if any
If Transition is detected at actual time A
lag = A – P; (* difference between real and predicted *)
end
You are going to run this code assuming a nominal bit time of 1 usec (e.g., T = 1 usec) and a
sender who is sending 5% slower than the receiver. Thus the sender sends his first bit from 0 to
1.05, the second bit from 1.05 to 2.1, the third from 2.1 to 3.15. Without doing any clock recovery
or lag adjustment the receiver would sample at what it thinks is the middle of a bit and so at 0.5,
1.5 etc. We would like to see what happens on the ten bit sequence 1010100011 with and without
clock recovery. Assume a 0 is encoded as 0 volts and a 1 as 1 volt.
– Use graph paper to draw a waveform of the 10 bits sent by the sender
– If the receiver does not run the clock recovery code, how far off is the sampling by the 10-
th bit?
– On the picture of the waveform you drew, draw the sampling instants and values of lag
assuming the receiver uses the pseudocode above for clock recovery and there is no noise.
– Now suppose there is a sharp noise spike of 1V at time 0.4 usec. How would it affect your
sampling times.
– Finally, suppose there is a sharp noise spike of 1V at time 2.4 usec. How would it affect your
sampling times?
4, Coding Techniques: : Consider a 8-level system in which you have voltage levels 8, 6, 4, 2, -2, –
4, -6, -8
Suppose that the Nyqvuist rate limits you to sending one symbol every usec (microsecond).
Suppose you want to send two bits every usec.
• How would do it? (Don’t worry if your answer is very simple; it’s meant to be easy.)
• Does your coding scheme guarantee transitions?
• Is it DC balanced?
Next, assume you want a DC balanced code but you want to transmit as many bits per second as
possible subject to this requirement.
• Devise the best DC-balanced code you can find. Describe it. (Hint: recall the way AMI obtained
a DC balanced code, and generalize slightly.)
• How many real bits can you transmit per usec?
• Can you guarantee transitions for clock recovery?
• What is the maximum amount of noise (in volts) your coding scheme can tolerate?
.
5. Modal Dispersion in Fiber: The last figure shows a multimode fiber. Assume that every 1 is
encoded as a pulse of light that splits into two signals, one of which goes the direct route and the
other goes by a long route (bouncing all the way). Suppose the time taken for the longest route is
150 nsec and the time taken for the shortest route is 110 nsec. What is the maximum bit rate we
can use on the fiber without causing intersymbol interference? What happens if we double the
length of the fiber link? (This has nothing to do with the Nyquist limit which is high for fiber).
Slow bit, 2 usec
4 Volts
INPUT(s)
F ec
4 Volts
OUTPUT
(same for
slow and
fast bit)
2 usec
2 Volts
output dies to 0V after 4 usec
3 usec 4 usec
− 2 Volts
Figure 1:
Expected transition instants
Current sampling instants
Figure 2:
Voltage
Signal S1
Signal S2
Time
Figure 3:
Slow Signal
SENDER
Direct Signal
RECEIVER