In this assignment you will do a software implementation of the Floating Point Adder whose
algorithm was covered in class, and is outlined in Figure 3.14 (Page 205 of the textbook).
Assume that each of the boxes numbered 1, 2, 3, and 4 require one clock cycle, and the
condition checks require zero time.
Inputs to the program will be:
1. A text file with each line containing a pair of floating point numbers to be added, in binary
representation (a string of ‘0’ and ‘1’ characters in the file). See sample below.
Outputs from the program will be:
1. A sequence of addition results, each line containing one result (a string of ‘0’ and ‘1’
characters) and the number of clock cycles required for performing the addition.
1. Software implementation of the floating point adder referred to above.
2. Test files used to verify your program. Remember to test for special cases such as
Overflow, Underflow, Normalised result, etc.
3. A document explaining the different test cases.
Sample Input File (each line contains the representation for 2 floating point numbers,
both 32 bits wide):
Sample Output File (just examples. These are not be the computed outputs for the above