EE 538 Homework #1 to 6 solutions

Description

EE 538 Homework #1

Problem 1: Circuit loading, filtering
R1
Vs
R2
Vo
C1
C2
Rs
RL
Design the bandpass RC filter to achieve >20dB attenuation at 1MHz and less than 0.1dB attenuation
from 1 Hz to 10 kHz.
a) First, ignoring loading effects, determine 3dB frequencies (f3dB,HP and f3db,LP) that meet the
specifications.
b) With Rs = 100Ω and RL = 10MΩ, choose R1, R2, C1, and C2 to minimize loading effects.
c) Simulate the frequency response (Vo/Vs) in Ltspice and plot it together with the ideal response
in MATLAB/Python.
Problem 2: Current sources, frequency response, loading
Is
Rout ZL
IL
Cout Vout
Use the circuit and variables (no values) for the following.
a) Sketch the frequency response (magnitude and phase) Vout/Is for ZL → .
b) Sketch the frequency response (magnitude and phase) Vout/Is together with the unloaded
response (part a) for the two conditions
1. ZL = CL
2. ZL = RL
c) Sketch the transient response of Vout for Is as a current step from 0 to Imax (ZL → ).
Problem 3: Sampling, settling, power dissipation
Tclk
clk
1
0
R
Vin C Vcap
The clock waveform shown above is used to drive the switch open and closed (clk = 1 → switch closed,
clk = 0 → switch open). Tclk is the clock period (50% duty cycle), where Tclk = 1/fclk. Vin = 1V, R = 100 Ω,
and C = 10 pF
a) What is the maximum clock frequency, fclk, that allows 0.1% settling precision of Vcap each
period?
b) Given this clock frequency, what is the average current delivered to the capacitor?
c) Verify your answers to a) and b) using Ltspice. To do this using a DC source fo Vin, you need to
use an initial condition (0V) on Vcap. Include any relevant plots in your submission.
d) Perform an AC simulation on the circuit in Ltspice (switch closed). Relate the frequency response
to the settling time and include any relevant plots.

EE 538 Homework #2

Problem 1: Common-emitter amplifier
Vout
RE
VCC
Vin
RB1
VCC
RB2
C
RC
VB

For the following, use the figure and the simplified NPN model from Section 2.1.1 in AoE. VCC = 5V, C =
1µF, and  = 100. Use the npn Ltspice component for your simulations.
a) Select values for RB1 and RB2 to achieve VB = 1V and a high-pass corner frequency (f3dB) of 10Hz.
You may ignore base current for this step.
b) Choose RC and RE for a gain of −10V/V (at 10kHz) and a collector current of 1mA. What is the DC
value of VCE?
c) Derive the transfer function for Vout/Vin and plot the frequency response (magnitude and phase)
in MATLAB/Python.
d) Perform an AC simulation of the circuit in Ltspice. Export the frequency response data for
comparison to the ideal response from Part c (plot them together). Provide reasons for any
discrepancies between the two.
Problem 2: Emitter follower
Vout, DC + vout
RE
VCC
vin
Vbias
1mA
vout
gmvbe
B
vbe
ib
ib
E (+1)ib
C
RE
Figure 2a. Emitter follower Figure 2b. Small-signal equivalent circuit
Use the Ebers-Moll model of the BJT and the figures to answer the following questions. VCC = 5V, IS =
10−16
, and  = 100. When determining input/output resistances, connect a test voltage to the smallsignal circuit and determine the resistance as r = vtest/itest. Use the npn Ltspice component for your
simulations.
a) Design the biasing of the emitter follower (i.e. determine VB and RE) such that the collector
current is 1mA and the DC level of Vout is 1V. You can do this by hand or use a MATLAB/Python
script.
b) Use the small-signal model (Fig. 2b) to determine the input resistance of the circuit.
c) Use the small-signal model (Fig. 2b) to determine the output resistance of the circuit.
d) Verify your design in Ltspice and include all relevant SPICE schematics and results in your
submission.

EE 538 Homework #3

Problem 1: Common-emitter versus common-source amplifier
VCC
Vout
Vin
IC
CL
VDD
Vin
ID
CL
Vout
Figure 1a. Common-emitter (CE) amplifier Figure 1b. Common-source (CS) amplifier

For the following, T = 300K, VA = 100V, VGS − Vth = 500mV,  = 0.1V-1
, CL = 10pF and IC = ID = 1mA.
a) (5 points) Calculate the DC voltage gain vout/vin for each structure. Determine the ratios gm/IC
and gm/ID (transconductance efficiency).
b) (5 points) For each structure, determine the small-signal transfer function vout/vin as a function
of frequency. Plot the Bode magnitude and phase (by hand or using MATLAB/Python). For each,
calculate the transit frequency fT, the frequency at which the magnitude of the transfer function
is equal to 1V/V.
c) (5 points) The so-called “square-law” model of the FET incorrectly predicts that current becomes
arbitrarily small (and gm arbitrarily large) as VGS – Vth approaches zero. For values of VGS smaller
than Vth (subthreshold operation), the drain current is better described as
𝐼𝐷 = 𝐼𝑆𝑒
𝑉𝐺𝑆/𝑛𝑉𝑇,
where IS and n are technology parameters related to the device structure. For n = 1.5, calculate
the transconductance efficiency (gm/ID) of the FET assuming subthreshold operation. How does
it compare to your answers in Part a)?
Problem 2: Temperature-independent voltage reference (BJT DC analysis)
DVB E
Q1 Q2
N
VBE1
+
–
VBE2
+
–
VCC VCC
R1
R2
R2
VCTAT
Figure 2. PTAT Voltage Generator
Temperature-insensitive voltage and current references are critical components of precision sensor
systems. A temperature-independent reference is created by combining something (e.g. a voltage) that
has a positive temperature coefficient (proportional-to-absolute-temperature, PTAT) with something that
has a negative temperature coefficient (complementary-to-absolute-temperature, CTAT). When biased
with a constant current, the VBE of a BJT exhibits a slope of approximately −2mV/C (CTAT). Combining
this with the difference of the VBE’s of two BJT’s biased with different current densities (which is PTAT),
properly scaled, will yield a voltage that is (approximately) independent of temperature:
𝑉𝐵𝐺 = 𝑉𝐶𝑇𝐴𝑇 + 𝑉𝑃𝑇𝐴𝑇 = 𝑉𝐵𝐸(𝑇) + 𝑀 × ∆𝑉𝐵𝐸(𝑇)
Note that different current densities for Q1 and Q2 are achieved by connecting N transistors in parallel
for Q2.
For the following, use the 2N3904 npn transistor (IS = 10-14A,  = 300, VA = 100) and the
UniversalOpamp2 models in Ltspice. Use VCC = 5V for the supply voltage.
a) (5 points) Determine values for N and R1 such that IC1 = IC2 = 50A at room temperature (27C).
b) (5 points) Determine the temperature slope of VBE1 via simulation and calculate the value of M
that would satisfy the above equation.
c) (5 points) Verify the design of the PTAT generator in Ltspice, plotting the expression 𝑉𝐵𝐸(𝑇) +
𝑀 × ∆𝑉𝐵𝐸(𝑇) as a function of temperature. Include your schematic in your submission, showing
all relevant voltages and currents at room temperature. Evaluate
1. the value of VBG at room temperature, and
2. the maximum deviation from this value over the temperature range −40C to 125C.
Bonus (2 points): Complete the design of the Brokaw bandgap circuit.
Problem 3: Nonlinear distortion in a common-source amplifier
The output voltage of a resistor-loaded common-source amplifier is expressed (neglecting ) as
𝑉𝑜𝑢𝑡 = 𝑉𝐷𝐷 − (𝑉𝑖𝑛 − 𝑉𝑡ℎ
)
2𝑅𝐷
a) (5 points) Assuming the amplifier is driven with a sinusoidal voltage Vin = ain  sin(2f0t) + VDC,
where VDC = Vth + 500mV, determine expressions for the amplitudes of the fundamental
(sinusoid at f0 with amplitude a1) and second harmonic (sinusoid at 2f0 with amplitude a2) using
the trigonometric relationship
sin2
(𝑥) =
1
2
[1 − cos(2𝑥)]
b) (5 points) Calculate the ratio of a2/a1 for ain = 1mV and ain = 10mV.

EE 538 Homework #4

Problem 1: DC analysis of inverting and non-inverting amplifiers
R1
R2
Vout
Vin
R1
R2
Vout
Vin
Figure 1a. Inverting amplifier Figure 1b. Non-inverting amplifier
For the two amplifiers shown above, the opamp has open-loop DC gain A0, input resistance Rin, and
output resistance Rout. For the Ltspice parts, use the UniversalOpamp2 (SpiceModel level.1), with R1
= 1k and R2 = 10k. The default open-loop output resistance for the opamp model is 0.1. You
can use the ‘DC Transfer’ analysis.
a) (5 points) For the inverting and non-inverting amplifiers shown in Fig 1a and 1b, determine
expressions for each of the following assuming A0→  (infinite open-loop gain). Provide
comments on how each closed-loop parameter compares to its open-loop counterpart.
1. Closed-loop gain (Vout/Vin).
2. Closed-loop output resistance.
3. Closed-loop input resistance.
b) (5 points) Repeat Part a assuming A0 is finite. Try to develop some intuition regarding how each
parameter depends on A0 and the feedback factor . Check your answer by setting A0→  and
comparing to your answer in Part a.
c) (2.5 points) Assuming the opamp has a voltage offset vOS, what is the resulting output offset for
each structure? Assume A0→ . Check your answer in Ltspice.
d) (2.5 points) Assuming the opamp has input bias current IB, what is the resulting output offset for
each structure? Assume A0→ .
Problem 2: Opamp circuit transient response
vout
C
R
iin
iin
t
0
imax
ton
t = 0
Figure 2a. Current-input integrator Figure 2b. Input current pulse

For the following, assume ideal opamp behavior.
a) (2.5 points) Determine an expression for the transfer function vout/iin.
b) (5 points) Determine an expression for the transient response of the circuit. What is the value of
vout (in terms of R, C, imax, and ton) at time t = ton?
Bonus (2 points): Design the circuit (i.e. determine R and C) to function as an integrator, such that
vout(ton) = imax/C with less than 0.1% error. Use imax = 10µA and ensure vout doesn’t exceed a bipolar
supply voltage of 2.5V. Verify your design in Ltspice.
Problem 3. Difference amplifier
R3
R4
vout
vim
vip
R2
R1
Figure 3. Difference amplifier
For the following, the opamp has a DC gain (A0) of 100 dB and a unity-gain bandwidth (fT) of 10MHz but
is otherwise ideal (Rin =  and Rout = 0). R1 = R2 = R3 = R4 = 10k.
a) (2.5 points) Sketch the Bode magnitude and use the graph to approximate the 3dB bandwidth.
Sketch the Bode phase plot.
b) (5 points) Calculate the DC gain and 3dB bandwidth of the closed-loop transfer function vout/(vip
– vim). Sketch the Bode magnitude and phase of the closed-loop transfer function.
c) (5 points) What is the resistance “looking into” each input (vim and vip)?
d) (5 points) Check your answers to Parts b and c in Ltspice using the Analog Devices opamp model
for the AD8691.

EE 538 Homework #5

Problem 1: Difference amplifier analysis
Ri Rf
vout
Rf
Ri
Rs
vs
Zin
Figure 1. Difference amplifier
A difference amplifier is driven by a sensor with source impedance Rs. Let Rf = 10k and Ri = 100.
Assume ideal opamp behavior.
a) (5 points) Derive an expression and determine a value for the DC differential input impedance
Zin of the amplifier. Determine the source impedance Rs that results in a maximum of 0.1%
attenuation of the input voltage.
b) (5 points) Simulate the amplifier in Ltspice using the UniversalOpamp2 component (default
parameters). Plot Zin up to 10MHz using AC analysis to show how it varies as a function of
opamp gain.
Problem 2: Instrumentation amplifier analysis
Figure 2. Instrumentation amplifier
Assume the above opamps have a DC gain of 120dB and an fT of 1MHz. Nominal resistance values are Rfp
= Rfm = 4.95k, RG = 100, and R1 = R2 = 10k, all with 0.1% tolerance.
a) (5 points) Determine the differential DC gain of the amplifier and the closed-loop bandwidth.
Ignore resistor mismatch.
b) (5 points) Based on the value of fT, what is the closed-loop gain error at 100Hz? Ignore
mismatch.
c) (5 points) Including the effect of resistor mismatch, what are the CMRR and the worst-case DC
gain error? Assume infinite opamp open-loop gain.
d) (5 points) Assume U1 and U2 have min/max input offset voltages of 100V but are otherwise
identical. What is the maximum allowable offset of U3 to achieve a worst-case input-referred
offset (the offset at Vout divided by the differential gain) of 250V? Ignore resistor mismatch.
e) (10 points) Simulate the instrumentation amplifier in Ltspice using the UniversalOpamp2
component with appropriate Avol, GBW, and Vos values. Provide the following in your
submission:
1. Image of your schematic showing the DC operating point (DC voltages at all nodes). Use
the worst-case mismatch condition for the resistors. How much is the offset affected by
resistor mismatch?
2. Plot showing the closed loop gain error at 100Hz using WC analysis. You can do this by
selecting ‘list’ for the sweep type under AC analysis. Note that you need to run 128
iterations (27
, where 7 is the number of resistors) to cover all mismatch combinations.
Compare the contributions to gain error from finite opamp gain and resistor mismatch
(i.e. which effect is more significant?).
3. Bode plots demonstrating closed-loop differential gain/phase and closed-loop commonmode gain/phase. For common-mode gain you should use the worst-case mismatch
condition for the resistors.
RG
Rfp
Vip
Rfm
Vim
R1 R2
Vout
R1 R2
Vref
U1
U2
U3

EE 538 Homework #6

Problem 1: Feedback amplifier noise
Ri
Rf
Vout
Vin
Figure 1. Inverting amplifier
Rf = 10k and Ri = 1k. The opamp has a gain-bandwidth product (fT) of 10MHz, input voltage noise
density (en) of 10nV/Hz, and input current noise density of 1pA/Hz.
a) (10 points) Determine the input-referred noise voltage density (in V/Hz) of the amplifier,
including contributions from all noise sources.
b) (5 points) Determine the equivalent noise bandwidth (fENB) and input-referred RMS noise
voltage.
c) (5 points) Check your answers to a) and b) by simulating the circuit in Ltspice using the
UniversalOpamp2. Be sure to set the noise voltage density ‘en’ and current noise density ‘in’ to
the appropriate values. To verify the RMS noise voltage, you can ctrl-click on the plot title (or
export the data to MATLAB/Python).
Problem 2: Opamp noise characterization
Rs Vs
Figure 2. Opamp noise testbench
Characterize the noise performance of the AD8691 and ADA4898 opamps. For the AD8691, use a single
supply of 5V. For the ADA4898, use a split supply of +/-5V. Be sure to observe any test conditions
provided in the datasheet(s) when running your tests.
a) (5 points) Using the unity-gain feedback configuration shown, verify the 3dB bandwidth of each
amplifier. Use this to calculate their equivalent noise bandwidths.
b) (5 points) Setting Rs = 0, perform noise simulations to verify the input voltage noise density of
each opamp at the frequencies specified in their datasheets.
c) (5 points) For the ADA4898 only, set Rs to a value large enough such that the opamp’s current
noise density should be 10 times that of its voltage noise. Verify the current noise at the output
of the amplifier using the relationship en,out = inRs. Be sure to use the term ‘noiseless’ after the
resistor value to ensure its noise doesn’t affect the simulation results.
d) (5 points) Calculate the expected output RMS output noise in a 1MHz bandwidth for each
amplifier and perform a noise simulation to verify. Note/explain any discrepancies.