Description
Objectives
• To use knowledge of common-source, source-follower and common-gate amplifier configurations to design a
practical active balun circuit.
• To confirm design predictions using hand analysis and simulation tools.
• To build and test the designed balun circuit; to practice systematic laboratory troubleshooting skills.
Introduction
A balun is a circuit that converts a single-ended signal to a differential one. The single-ended signal could be generated
by a sensor or antenna. Differential signals are often better for transmitting across long wires because they cancel out
environmental interference and noise. Differential signals are also required for signal processing with differential
circuits like modulators.
Most baluns are made using passive devices – transformers, resistors, inductors, etc. An active balun uses an amplifying
device like a MOSFET or BJT. A standard MOSFET active balun circuit is shown in Fig. 1. The MOSFET device
in this circuit is biased in saturation, and works both as a common-source (CS) amplifier and as a source-follower
(SF). When considering the signal transferred from vg to vo1, we have a CS circuit. When considering the signal
transferred from vg to vo2, we have a SF circuit. To make a good balun, we want the CS and SF circuits to have
equal gain, so that the differential output is balanced.
Parts and Equipments Required
Parts
• (1) CD4007 chip.
• (4) 1µF capacitors.
Utah State University Spring 2015 1
ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
• (1) 100kΩ resistor.
• (2) 1kΩ resistors.
• (1) 300Ω resistor.
• (4) calculated resistor values.
Equipment
• Dual power supply – use to supply VDD and VG.
• Digital multimeter – use to verify bias voltage and current.
• Function generator – use to generate vin.
• Dual-channel oscilloscope – use to measure the input and output signals.
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ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
1 Pre-Lab
Exercise 1. You will design the active balun circuit of Fig. 1 by choosing appropriate resistor values and bias
voltages. Several of the resistances and bypass capacitor values are given in Table 1. The MOSFET M1
is an N-type device from the CD4007 package. The characteristics of M1 are given in Table 2.
Active Balun Design Problem
Derive small-signal expressions for the mid-band Common-Source and Source-Follower gains of the balun circuit:
ACS ,
vo1
vg
ASF ,
vo2
vg
.
Use the small-signal equivalent circuit model shown in Fig. 2. Note that “mid-band” means you can ignore all
capacitances in this analysis. Record the derivations in your lab book, and put the expressions in your final
report.
We want the two gains to be ASF = 0.5V/V and ACS = −0.5V/V. Then the overall differential gain will be Ad =
ASF −ACS = 1.0V/V. Suppose the MOSFET has gm = 1mA/V. Solve for RS and RD under the assumption that ro is
very large (i.e. ro → ∞), and verify that the gains are ±0.5V/V. Also determine the MOSFET’s large-signal bias
current, ID (use the formula gm =
p
2µnCox (W/L)ID), and determine the gate voltage, VG, needed to generate this
current. Put all your analysis and calculations in your lab book. List your final results in a table:
Parameter Value Parameter Value M1 Operating Region (check one)
RD VS1 Linear
RS VG1 Triode
ID VD1 Saturation
VGS1 −VT0N VDS1 Cutoff
Include this table in your lab book and in your final report. You should find that M1 is operating in saturation.
Recall that saturation is where VDS ≥ VGS −VT h. If your result is not in saturation, you should re-do all your design
calculations.
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ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
Exercise 2. Suppose the balun’s input signal is delivered from a 300Ω transmission line, and the balun is required
to act as a matched line termination, i.e. the balun’s input resistance should equal 300Ω. The NMOS
active balun circuit has a very high input impedance due to the gate of M1, which causes reflections in
the transmission line. To provide the proper input resistance, a common-gate amplifier circuit is inserted
in series with the balun’s input, as shown in Fig. 3. The common-gate circuit is designed to have a total
input impedance of 300Ω and a low gain.
Matched Impedance Design Problem
Derive expressions for the gain and input resistance of the Common-Gate stage. Using these expressions, calculate
values of R2, R3 and M2’s bias current, ID2, to satisfy the following constraints:
• gm2 = 1.5mA/V.
• ACG = 1V/V, where ACG , vg1/vs2.
• Rin = 300Ω.
Use the mid-band equivalent small-signal circuit model shown in Fig. 4. Note that in the mid-band model, the C1 acts
like a short circuit, so vd2 = vg1. The input resistance, Rin, is the effective resistance seen looking into the commongate
circuit. Derive an expression for Rin using by applying a test voltage vx to the input, as illustrated in Fig. 5. Then
solve for the total current, ix, that goes into the amplifier. The input resistance is Rin = vx/ix. Using the small-signal
model, show that the input resistance is R2 k 1/gm, and the gain (from source to drain) is approximately gmR3 (note
that R1 is ignored in this analysis because it is very large, so that R3 k R1 ≈ R3). Calculate the values for R2 and R3
that are required to yield the specified input resistance and gain.
Once your resistor values are chosen, solve the DC values of VD2, VS2 and VG2 and verify that M2 is in saturation.
Record your final expressions and calculated values in a table like this one:
Parameter Expression Calculated Value Parameter Value M2 Operating Region (check one)
Rin VGS2 −VT0 linear
ACG VS2 triode
R2 VG2 saturation
R3 VD2 cutoff
ID2 VDS2
Record all derivations and calculations in your lab book. In your final report, give the derived expressions and
calculated values in a table.
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ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
+ VG –
vIN
VDD
C1
R1
RD
RS
C2
C2
RL
RL
+
–
vOUT
M1
vo1
vo2
CS
SF
vg1
vs1
vd1
Figure 1: A MOSFET active balun circuit.
gm vg − v ( o2 )
RS RL
RD RL
vo1
vo2
Figure 2: Small-signal mid-band equivalent circuit for the active balun.
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ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
+ VG –
vIN
VDD
C1
R1
RD
RS
C2
C2
RL
RL
+
–
vOUT
M1
vo1
vo2
VDD
VG
R2
+
–
Common-Gate Stage
M 2
vs2
vd 2
vg1
vs1
vd1
R3 R4 = 300Ω 1µF
Figure 3: A common-gate circuit is inserted to match the balun’s input impedance.
vIN
+
–
R2
!gmvs2
vs2
R3 ! R1
vg1
Rin
300Ω
Figure 4: Small-signal mid-band equivalent circuit for the common-gate stage.
+
– R2
−gmvs2
vs2
R3 R1
vx
ix
Figure 5: Model for calculating the effective input resistance, Rin, of the Common-Gate amplifier.
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ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
Table 1: Given Data for the Active Balun Circuit.
Component Description Value
C1 Input bypass capacitor. 20µF
R1 Input high-pass filter resistor. 100kΩ
C2 Output bypass capacitor. 1µF
RL Load resistance. 2kΩ
VDD Main supply voltage 10V
Table 2: Device data for CD4007 NMOS component.
Parameter Description Value
µNCox W
L
Scale constant. 333µA/V
2
VT0 Threshold voltage. 2.0V
Utah State University Spring 2015
ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
Exercise 3. You should now have a complete active balun design with values for all components and bias voltages.
Create a SPICE description of the active balun circuit with Common-Gate input stage (Fig. 3). For
the input signal, use a 50kHz sinusoidal voltage source with a peak-to-peak amplitude of 1V. Perform
a transient simulation covering three periods of the input signal. Plot the single-ended input and the
differential output signals, and include these plots in your lab book and final report.
Verify that the output signals are amplitude-balanced and phase-balanced. To do this, measure the
amplitude of vo1 and vo2. If their amplitudes are equal, then the signal is amplitude balanced. If they are
not equal, record the amount of amplitude imbalance in your lab book, and explain what design
change could be made to improve the amplitude balance.
Measure the amplitude imbalance as the difference in amplitudes, in dBm:
∆A = 20log
|ACS +ASF|
0.001
,
where ACS is assumed to be a negative quantity, and ASF is assumed to be positive.
To measure the phase balance, zoom in to where the transient output curves cross zero. They should
ideally cross zero at the same time. If they don’t, measure the time difference, ∆t, between the zerocrossings.
Then the phase imbalance is given by
∆φ = 2π f∆t.
Record the phase imbalance in your lab book, and include it in your final report. Also include
your SPICE input file as an appendix to the report.
2 Physical Experiments
Procedure 1. First construct the active balun circuit of Fig. 11
. Use the bench power supply to provide VDD = 10V,
and to provide the desired gate bias voltage VG.Use the digital multimeter to precisely measure the value
of all resistances. Record these measurements in a table in your lab book.
Procedure 2. Measure the DC operating point.
Step A. Step Use the digital multimeter to measure the DC voltage at every node in your circuit.
Step B. Use the multimeter to measure the bias current, ID, by connecting the meter probes in series
between RD and VDD.
Step C. Record the measurements in a table and compare them with your design predictions.
1Caution: CMOS devices are very sensitive to electro-static discharge (ESD). To avoid damaging your components, always touch a grounded
surface before handling any MOS chips. Ideally, you should wear a grounded wrist strap when handling sensitive components.
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ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
Step D. Re-calculate your design predictions using the measured resistor values, and add these results to
your table.
Step E. Take note of any remaining discrepancies, and try to explain them in your report.
Procedure 3. Verify the small-signal behavior.
Step A. Connect the function generator to create a 50kHz signal with a peak-to-peak amplitude of 1V.
Verify the waveform using the oscilloscope before connecting it to your circuit.
Step B. After the waveform is verified, connect it to your circuit. Use the oscilloscope probe to measure
the output waveforms vo1 and vo2.
Step C. If you are using a digital-capture oscilloscope, record the waveform and include it in your lab
book and final report. Alternatively, use a digital camera to take a snapshot of the scope display.
As a last resort, you may sketch the waveform, but be sure to include as much detail as possible.
Procedure 4. Measure the amplitude balance.
Step A. Using the oscilloscope, obtain precise measurements of vin, vo1 and vo2.
Step B. Record a table of gain values in your lab book:
ACS =
vo1
vin
ASF =
vo2
vin
Ad =
vo1 +vo2
vin
.
Step C. Do the measured results agree with the predictions? How much amplitude imbalance is observed?
• Record the measurements in a table and compare them with your design predictions.
• Re-calculate your design predictions using the measured resistor values, and add these results
to your table.
• Take note of any remaining discrepancies, and try to explain them in your report.
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ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
Step D. Include the amount of amplitude imbalance in your final report.
Procedure 5. Measure the phase balance.
Step A. Use the zero-crossing procedure to measure the phase imbalance of your circuit.
Step B. Record this value in your lab book and include it in your final report.
Procedure 6. Build and verify the Common-Gate stage.
Step A. Disconnect the function generator from your circuit, and construct the Common-Gate circuit
of Fig. 3.Use the digital multimeter to measure the precise value of all resistors.Record these
measurements in a table in your lab book.
Step B. Measure the DC voltages and bias current of the Common-Gate stage.
• Record the measurements in a table and compare them with your design predictions.
• Re-calculate your design predictions using the measured resistor values, and add these results
to your table.
• Take note of any remaining discrepancies, and try to explain them in your report.
Step C. Connect the signal generator to your circuit as indicated in Fig. 3.
Step D. Verify the input impedance as follows. First, use the oscilloscope to precisely measure the amplitudes
of vin , vg2 and vg1.
• The ratio of amplitudes is vg2/vin = Rin/(Rin +R4).
• Using this formula and your measurement of R4, determine the value of Rin.
• Also calculate the gain ACG = vg1/vg2.
• Record this measurement in your lab book, and in your final report.
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ECE 3410– Microelectronics I Lab 5: A MOSFET Active Balun Circuit
3 Report
Your final report should be a carefully written, formal summary of your lab results. It should include the following
specific information:
• A short introduction (one or two paragraphs) to the balun circuit, identifying its applications and explaining how
it works.
• Your derived expressions for the gains and input resistance: ACS, ASF, Ad, ACG and Rin. It is not necessary to
include the details of your derivation if they are in your lab book and have been checked by the instructor or TA.
• A table reporting the DC operating point, the small-signal gains, and the input resistance of your circuit. Include
three columns:
– Your original design predictions.
– Your revised predictions based on measured resistor values.
– Your actual measurements.
• Your measured amplitude and phase imbalance, as measured from SPICE simulations and the actual circuit.
– If you observed significant imbalance, offer a reasonable hypothesis to explain why. Suggest at least one
solution to remove the imbalance.
• A plot showing your SPICE transient simulation results.
• A figure showing the oscilloscope waveform from the lab.
• Conclusions should summarize the success of your design choices and succinctly report any pitfalls that may
affect users of this circuit in the future.
• Your SPICE circuit description should be attached as an appendix.
